1. Field of the Invention
The present invention relates to the field of phase and amplitude modulating and demodulating carriers and subcarriers, and in particular to the modulating and demodulating of PAL and NTSC video chroma signals and the like which are carried on a quadrature (as well as other angle) phase and amplitude modulated subcarrier in the video signal.
2. Description of the Prior Art
The prior art contains many circuits for performing modulating and demodulating in phase modulation systems. A typical chroma demodulator is shown in FIG. 1 which shows a composite video input 1 from which composite video is coupled to Band Pass Filter (BPF) 2 which passes the chroma subcarrier of the video 5, sync separator 3 which provides a burst flag signal (BF) 6 in response to the video sync, and low pass filter (LPF) 4 which passes the luminance (Y) portion 7 of the video signal. A phase locked loop (PLL) 8 receives the chroma 5 and burst flag 6 and phase locks an oscillator to the reference chroma burst of signal 5, providing continuous chroma reference signals in quadrature 9 and 10. The quadrature reference signals 9 and 10 are multiplied with the chroma signal in multipliers 11 and 12, respectively, to effect the phase demodulation of the subcarrier. The resultant signals are low pass filtered (LPF) by 13 and 14 to remove the subcarrier and harmonic signals from the demodulated signals which in this example are Red-Luminance (R-Y) 15 and Blue-Luminance (B-Y) 16.
Other demodulation angles have been used, such as I and Q, however in this prior art example, R-Y and B-Y is assumed. The R-Y and B-Y signals are then passed, along with the Y signal, to the color matrix 23 where the RED (R) 19, GREEN (G) 20 and BLUE (B) 22 signals are derived by combining elements 17, 18 and 21, respectively. This type of prior art chroma demodulator is widely used and works fairly well, however due to its analog nature it requires alignment and precision components to achieve any moderate degree of performance. In addition, the PLL must be a crystal type, if it is to be relatively low in cost, or must be a very complex sync and burst locked circuit such as described in U.S. Pat. No. 4,026,041. The circuit does not lend itself to implementation in digital form, mainly due to the complexities of implementing a suitable VCO and PLL 8 to generate the quadrature reference signals 9 and 10.
FIG. 2 shows another prior art demodulator embodiment having BPF 24 corresponding to 2 of FIG. 1 to provide chroma 27, PLL 30 of the type described in U.S. Pat. No. 4,026,041 responsive to furst flag 28 from sync separator 25 for generating a sampling clock 31 which is phase locked to the color burst, which sampling clock is coupled to an A-D convertor 26 which digitizes the composite video input to provide a digitized video stream 29, shown to be a single line connection, however one skilled in the art will understand that the single line connection as well as the single element circuits which are shown herein represent multiple digital elements and connections. Digital video 29 also connects to FIR BPF (Finite Impulse Response Band Pass Filter) 33 corresponding functionally to 24 and to 2 of FIG. 1, FIR LPF 34 corresponding to 4 of FIG. 1 to provide Luma 30, FIR BPFs 38 and 39 corresponding to 13 and 14 of FIG. 1 and providing R-Y 40 and B-Y 41, and Matrix 42 corresponding to 23 of FIG. 1. In this prior art example, since the sampling clock is phase locked to the color burst of the video signal, and the frequency is chosen to be 4 times the subcarrier frequency, the four samples per subcarrier cycle then correspond to the four quadrature phases of the reference subcarrier. The sampling clock may then be divided by 2 by element 32 and coupled to a suitable switch 37 to alternately apply the digital chroma samples (with appropriate polarity inversion by the switch) to the color difference low pass filters 38 and 39. This system is fairly complex by virtue of the stringent phase locking requirement of the sampling clock which is placed on 30. The system is not suitable for use in heterodyne color systems such as used in home video recorders. In heterodyne color systems, the color subcarrier frequency is not phase locked to the video sync horizontal frequency. In order to perform any digital video processing, such as image manipulation, it is desirable to have the sampling clock phase locked to the horizontal sync. Since in heterodyne color systems the color subcarrier is not phase or frequency locked to sync, it is not possible to have the sampling clock 31 phase or frequency locked to both sync and color burst by 30.
FIG. 3 shows yet another prior art chroma demodulator which utilizes an A-D 44 to digitize composite video 43 providing digitized video 45 corresponding to 26, 1 and 29, respectively of FIG. 2, BPF 46 providing digital chroma 50 corresponding to 33 and 35 of FIG. 2, LPF 48 providing Y signal 54 to Matrix 66 corresponding to 34, 36, and 42 of FIG. 2, and color difference LPFs 62 and 63 corresponding to 38 and 39 of FIG. 2. Additionally, FIG. 3 shows a digital sync separator 47 which provides H sync 52 to a digital PLL 49 which generates an H locked sampling clock 53 which the A-D 44 utilizes for sampling the video. Element 7 also provides BF 51 which is coupled to a second digital PLL 55 to provide digital quadrature reference signals 56 and 57 in response to chroma subcarrier reference burst of 50, which reference signals are multiplied with chroma 50 in multipliers 58 and 59 to provide the R-Y and B-Y signals 60 and 61 which are coupled to 62 and 63 providing filtered R-Y 64 and B-Y 65. This prior art circuit overcomes the problem of operating with heterodyne color but at the expense of a second PLL 55 which adds to the expense of the circuit which is already impacted by the first digital PLL 49. In addition, it is difficult to achieve an accurate phase lock with PLL 55, which is most commonly implemented with a crystal oscillator at some high frequency, usually around 30 MHz, and a numerically controlled oscillator (NCO). The NCO requires a fairly large accumulator in order to achieve phase lock accuracies which typically need to be within 1.degree..